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114
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APCSAC
2001
IEEE
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Computer Architecture
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APCSAC 2001
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Retargetable Cache Simulation Using High Level Processor Models
15 years 6 months ago
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www.cse.iitk.ac.in
During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simula...
Rajiv A. Ravindran, Rajat Moona
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