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    APCSAC
    2001
    IEEE
    94views Computer Architecture» more  APCSAC 2001»
    Retargetable Cache Simulation Using High Level Processor Models
    15 years 1 months ago
    Retargetable Cache Simulation Using High Level Processor Models
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    During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simula...
    Rajiv A. Ravindran, Rajat Moona
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