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ICCAD
1995
IEEE
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ICCAD 1995
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A delay model for logic synthesis of continuously-sized networks
15 years 6 months ago
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ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
Joel Grodstein, Eric Lehman, Heather Harkness, Bil...
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