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117
Voted
DAC
2005
ACM
117
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Computer Architecture
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DAC 2005
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Circuit optimization using statistical static timing analysis
15 years 5 months ago
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www.cecs.uci.edu
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladi...
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