Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
PDF Tools
Image Tools
Text Tools
OCR Tools
Symbol and Emoji Tools
On-screen Keyboard
Latex Math Equation to Image
Smart IPA Phonetic Keyboard
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
113
Voted
FORMATS
2006
Springer
79
views
Formal Methods
»
more
FORMATS 2006
»
Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata
15 years 6 months ago
Download
www-asim.lip6.fr
Using a variant of Clariso-Cortadella's parametric method for verifying asynchronous circuits, we formally derive a set of linear constraints that ensure the correctness of so...
Remy Chevallier, Emmanuelle Encrenaz-Tiphèn...
claim paper
Read More »