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129
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ASPDAC
2008
ACM
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ASPDAC 2008
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Clock tree synthesis with data-path sensitivity matching
15 years 5 months ago
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vlsida.soe.ucsc.edu
This paper investigates methods for minimizing the impact of process variation on clock skew using buffer and wire sizing. While most papers on clock trees ignore data-path circuit...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...
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