Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
PDF Tools
Image Tools
Text Tools
OCR Tools
Symbol and Emoji Tools
On-screen Keyboard
Latex Math Equation to Image
Smart IPA Phonetic Keyboard
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
84
Voted
DAC
2008
ACM
131
views
Computer Architecture
»
more
DAC 2008
»
Automated transistor sizing for FPGA architecture exploration
16 years 3 months ago
Download
www.eecg.toronto.edu
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
Ian Kuon, Jonathan Rose
claim paper
Read More »