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125
Voted
ICCAD
2009
IEEE
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ICCAD 2009
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Pre-bond testable low-power clock tree design for 3D stacked ICs
15 years 27 days ago
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www.gtcad.gatech.edu
Pre-bond testing of 3D stacked ICs involves testing individual dies before bonding. The overall yield of 3D ICs improves with prebond testability because designers can avoid stack...
Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung K...
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