Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
PDF Tools
Image Tools
Text Tools
OCR Tools
Symbol and Emoji Tools
On-screen Keyboard
Latex Math Equation to Image
Smart IPA Phonetic Keyboard
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
138
click to vote
TVLSI
2002
130
views
more
TVLSI 2002
»
Incremental compilation for parallel logic verification systems
15 years 2 months ago
Download
www.ecs.umass.edu
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
claim paper
Read More »