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MICRO
2005
IEEE
126
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Hardware
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MICRO 2005
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Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
15 years 8 months ago
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cccp.eecs.umich.edu
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
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