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88
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ASPDAC
2005
ACM
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ASPDAC 2005
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Static power minimization in current-mode circuits
15 years 8 months ago
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eprints.iisc.ernet.in
-We propose a method involvingselectivesignalgating to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current ...
M. S. Bhat, H. S. Jamadagni
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