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106
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ASYNC
1999
IEEE
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ASYNC 1999
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Verification of Delayed-Reset Domino Circuits Using ATACS
15 years 7 months ago
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www.async.ece.utah.edu
This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...
Wendy Belluomini, Chris J. Myers, H. Peter Hofstee
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