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96
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ICCAD
2005
IEEE
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ICCAD 2005
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Synthesis methodology for built-in at-speed testing
15 years 11 months ago
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www.eecs.berkeley.edu
We discuss a new synthesis flow, which offers the ability to do easy delay testing almost free in terms of its impact on speed and area as compared to corresponding implementation...
Yinghua Li, Alex Kondratyev, Robert K. Brayton
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