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    DAC
    2005
    ACM
    105views Computer Architecture» more  DAC 2005»
    Word level predicate abstraction and refinement for verifying RTL verilog
    16 years 19 days ago
    Word level predicate abstraction and refinement for verifying RTL verilog
    Download  www.kroening.com
    el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
    Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
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