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152
Voted
DAC
2010
ACM
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Computer Architecture
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DAC 2010
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An error tolerance scheme for 3D CMOS imagers
15 years 1 months ago
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cadlab.ece.ucsb.edu
A three-dimensional (3D) CMOS imager constructed by stacking a pixel array of backside illuminated sensors, an analog-to-digital converter (ADC) array, and an image signal process...
Hsiu-Ming Chang, Jiun-Lang Huang, Ding-Ming Kwai, ...
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