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    EURODAC
    1994
    IEEE
    128views VHDL» more  EURODAC 1994»
    A component selection algorithm for high-performance pipelines
    15 years 29 days ago
    A component selection algorithm for high-performance pipelines
    Download  www.cs.york.ac.uk
    The use of a realistic component library with multiple implementations of operators, results in cost ef cient designs; slow components can then be used on non-critical paths and t...
    Smita Bakshi, Daniel D. Gajski
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    EURODAC
    1994
    IEEE
    120views VHDL» more  EURODAC 1994»
    Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay
    15 years 29 days ago
    Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay
    Download  vlsicad.ucsd.edu
    Clock routing has become a critical issue in the layout design of high-performance systems. We show that the two passes bottom-up and top-down of the DME algorithm 2, 3, 4, 8 can ...
    Chung-Wen Albert Tsao, Andrew B. Kahng
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    EURODAC
    1994
    IEEE
    117views VHDL» more  EURODAC 1994»
    Using C to write portable CMOS VLSI module generators
    15 years 29 days ago
    Using C to write portable CMOS VLSI module generators
    Download  www.cecs.uci.edu
    Alain Greiner, Frédéric Pétro...
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    EURODAC
    1994
    IEEE
    130views VHDL» more  EURODAC 1994»
    RESIST: a recursive test pattern generation algorithm for path delay faults
    15 years 29 days ago
    RESIST: a recursive test pattern generation algorithm for path delay faults
    Download  www.cecs.uci.edu
    This paper presents Resist, a recursive test pattern generation (TPG) algorithm for path delay fault testing of scan-based circuits. In contrast to other approaches, it exploits t...
    Karl Fuchs, Michael Pabst, Torsten Rössel
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    EURODAC
    1994
    IEEE
    115views VHDL» more  EURODAC 1994»
    Overall thermal simulation of electronic equipment
    15 years 29 days ago
    Overall thermal simulation of electronic equipment
    Download  www.cs.york.ac.uk
    Jean-Louis Blanchard, Jean-Michel Morelle
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    EURODAC
    1994
    IEEE
    117views VHDL» more  EURODAC 1994»
    A hardware environment for prototyping and partitioning based on multiple FPGAs
    15 years 29 days ago
    A hardware environment for prototyping and partitioning based on multiple FPGAs
    Download  www.cs.york.ac.uk
    This paper presents a multiple-FPGA-based experimentation board. The problem to be solved is that of implementing a circuit into a set of FPGAs. This board provides a hardware env...
    Marc Wendling, Wolfgang Rosenstiel
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    EURODAC
    1994
    IEEE
    109views VHDL» more  EURODAC 1994»
    Fast OFDD based minimization of fixed polarity Reed-Muller expressions
    15 years 29 days ago
    Fast OFDD based minimization of fixed polarity Reed-Muller expressions
    Download  www.cs.columbia.edu
    Rolf Drechsler, Bernd Becker, Michael Theobald
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    EURODAC
    1994
    IEEE
    117views VHDL» more  EURODAC 1994»
    Hardware-software-codesign of application specific microcontrollers with the ASM environment
    15 years 29 days ago
    Hardware-software-codesign of application specific microcontrollers with the ASM environment
    Download  www.cecs.uci.edu
    A. Both, B. Biermann, R. Lerch, Yiannos Manoli, K....
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    EURODAC
    1994
    IEEE
    104views VHDL» more  EURODAC 1994»
    An efficient verification algorithm for parallel controllers
    15 years 29 days ago
    An efficient verification algorithm for parallel controllers
    Download  www.cecs.uci.edu
    Krzysztof Bilinski, Erik L. Dagless, Jonathan Saul...
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    EURODAC
    1994
    IEEE
    124views VHDL» more  EURODAC 1994»
    Parallel controller synthesis from a Petri net specification
    15 years 29 days ago
    Parallel controller synthesis from a Petri net specification
    Download  www.cecs.uci.edu
    Krzysztof Bilinski, Erik L. Dagless, Jonathan M. S...
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