Sciweavers

FCCM
2004
IEEE
96views VLSI» more  FCCM 2004»
13 years 11 months ago
Pre-Decoded CAMs for Efficient and High-Speed NIDS Pattern Matching
In this paper we advocate the use of pre-decoding for CAM-based pattern matching. We implement an FPGA based sub-system for NIDS (Snort) pattern matching using a combination of te...
Ioannis Sourdis, Dionisios N. Pnevmatikatos
FCCM
2004
IEEE
101views VLSI» more  FCCM 2004»
13 years 11 months ago
Secure Remote Control of Field-programmable Network Devices
A circuit and an associated lightweight protocol have been developed to secure communication between a control console and remote programmable network devices1 . The circuit provi...
Haoyu Song, Jing Lu, John W. Lockwood, James Mosco...
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
13 years 11 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
FCCM
2004
IEEE
94views VLSI» more  FCCM 2004»
13 years 11 months ago
A Structured System Methodology for FPGA Based System-on-A-Chip Design
N. Pete Sedcole, Peter Y. K. Cheung, George A. Con...
FCCM
2004
IEEE
87views VLSI» more  FCCM 2004»
13 years 11 months ago
A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation
General purpose computing architectures are being called on to work on a more diverse application mix every day. This has been fueled by the need for reduced time to market and ec...
David Wentzlaff, Anant Agarwal
FCCM
2004
IEEE
107views VLSI» more  FCCM 2004»
13 years 11 months ago
An Alternate Wire Database for Xilinx FPGAs
This paper presents ADB, an Alternate Wire Database, suitable for routing, tracing, and browsing in Xilinx Virtex, Virtex-E, Virtex-II, and Virtex-II Pro FPGAs. While mainstream d...
Neil Steiner, Peter M. Athanas
FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
13 years 11 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
FCCM
2004
IEEE
95views VLSI» more  FCCM 2004»
13 years 11 months ago
An Arithmetic Library and Its Application to the N-body Problem
Kuen Hung Tsoi, Chun Hok Ho, H. C. Yeung, Philip H...
FCCM
2004
IEEE
121views VLSI» more  FCCM 2004»
13 years 11 months ago
Validation of an Advanced Encryption Standard (AES) IP Core
This paper describes the package of test bench code required to verify the Algotronix' AES IP Core. Several authors (see the references in [3]) have published papers detailing...
Valeri F. Tomashau, Tom Kean
FCCM
2004
IEEE
90views VLSI» more  FCCM 2004»
13 years 11 months ago
Migrating Functionality from ROMS to Embedded Multipliers
This poster proposes a technique, based on polynomial approximation, which can be applied to convert ROMs into a combination of arithmetic operations and smaller ROMs. We show tha...
Gareth W. Morris, George A. Constantinides, Peter ...