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103
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TVLSI
2010
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Artificial Intelligence
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TVLSI 2010
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A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
14 years 10 months ago
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www.ece.ucdavis.edu
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
Zhiyi Yu, Bevan M. Baas
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