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FPGA
1999
ACM

174views FPGA» more FPGA 1999»

Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs

15 years 7 months ago

Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...

Peter Kollig, Bashir M. Al-Hashimi

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