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132
Voted
FCCM
2002
IEEE
208
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VLSI
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FCCM 2002
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The Effects of Datapath Placement and C-Slow Retiming on Three Computational Benchmarks
15 years 8 months ago
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www.icsi.berkeley.edu
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
Nicholas Weaver, John Wawrzynek
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