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76
Voted
FTCS
1994
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14 years 10 months ago
Concurrent Error Detection in Self-Timed VLSI
This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are...
David A. Rennels, Hyeongil Kim
51
Voted
FTCS
1994
150views more  FTCS 1994»
14 years 10 months ago
Analysis of a Fault-Tolerant Multiprocessor Scheduling Algorithm
Daniel Mossé, Rami G. Melhem, Sunondo Ghosh