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    GLVLSI
    2006
    IEEE
    105views VLSI» more  GLVLSI 2006»
    A practical approach for monitoring analog circuits
    14 years 8 days ago
    A practical approach for monitoring analog circuits
    Download  hvg.ece.concordia.ca
    Formal methods have been advocated for the verification of digital design where correctness is proved mathematically. In contrast to digital designs, the verification of analog ...
    Mohamed H. Zaki, Sofiène Tahar, Guy Bois
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    GLVLSI
    2006
    IEEE
    155views VLSI» more  GLVLSI 2006»
    Dynamic voltage scaling for multitasking real-time systems with uncertain execution time
    14 years 8 days ago
    Dynamic voltage scaling for multitasking real-time systems with uncertain execution time
    Download  engineering.purdue.edu
    Dynamic voltage scaling (DVS) for real-time systems has been extensively studied to save energy. Previous studies consider the probabilistic distributions of tasks’ execution ti...
    Changjiu Xian, Yung-Hsiang Lu
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    GLVLSI
    2006
    IEEE
    119views VLSI» more  GLVLSI 2006»
    PWAM signalling scheme for high speed serial link transceiver design
    14 years 8 days ago
    PWAM signalling scheme for high speed serial link transceiver design
    Download  www.ece.neu.edu
    This paper presents a new signaling scheme called PWAM (pulse width and amplitude modulation) to obtain the optimum combination of bandwidth and performance of the serial link tra...
    Rui Tang, Yong-Bin Kim
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    GLVLSI
    2006
    IEEE
    98views VLSI» more  GLVLSI 2006»
    Rapid intermodulation distortion estimation in fully balanced weakly nonlinear Gm-C filters using state-space modeling
    14 years 8 days ago
    Rapid intermodulation distortion estimation in fully balanced weakly nonlinear Gm-C filters using state-space modeling
    Download  www.ece.jhu.edu
    State-space modeling of fully differential Gm-C filters with weak nonlinearities is used to develop a fast algorithm for intermodulation distortion estimation. It results in sim...
    Paul Sotiriadis, Abdullah Celik, Zhaonian Zhang
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    GLVLSI
    2006
    IEEE
    120views VLSI» more  GLVLSI 2006»
    Sensitivity evaluation of global resonant H-tree clock distribution networks
    14 years 8 days ago
    Sensitivity evaluation of global resonant H-tree clock distribution networks
    Download  www.ece.rochester.edu
    A sensitivity analysis of resonant H-tree clock distribution networks is presented in this paper for a TSMC 0.18 μm CMOS technology. The analysis focuses on the effect of the dri...
    Jonathan Rosenfeld, Eby G. Friedman
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    GLVLSI
    2006
    IEEE
    133views VLSI» more  GLVLSI 2006»
    Design approaches for hybrid CMOS/molecular memory based on experimental device data
    14 years 8 days ago
    Design approaches for hybrid CMOS/molecular memory based on experimental device data
    Download  people.virginia.edu
    Garrett S. Rose, Adam C. Cabe, Nadine Gergel-Hacke...
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    GLVLSI
    2006
    IEEE
    83views VLSI» more  GLVLSI 2006»
    Effects of process and environmental variations on timing characteristics of clocked registers
    14 years 8 days ago
    Effects of process and environmental variations on timing characteristics of clocked registers
    Download  www.ece.rochester.edu
    William R. Roberts, Dimitrios Velenis
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    GLVLSI
    2006
    IEEE
    101views VLSI» more  GLVLSI 2006»
    Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance
    14 years 8 days ago
    Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance
    Download  www-tcad.stanford.edu
    Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
    Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, ...
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    GLVLSI
    2006
    IEEE
    142views VLSI» more  GLVLSI 2006»
    Dynamic instruction schedulers in a 3-dimensional integration technology
    14 years 8 days ago
    Dynamic instruction schedulers in a 3-dimensional integration technology
    Download  www.cc.gatech.edu
    We present the design of high-performance and energy-efficient dynamic instruction schedulers in a 3-Dimensional integration technology. Based on a previous observation that the c...
    Kiran Puttaswamy, Gabriel H. Loh
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    GLVLSI
    2006
    IEEE
    119views VLSI» more  GLVLSI 2006»
    Thermal analysis of a 3D die-stacked high-performance microprocessor
    14 years 8 days ago
    Thermal analysis of a 3D die-stacked high-performance microprocessor
    Download  www.cc.gatech.edu
    3-dimensional integrated circuit (3D IC) technology places circuit blocks in the vertical dimension in addition to the conventional horizontal plane. Compared to conventional plan...
    Kiran Puttaswamy, Gabriel H. Loh
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