85
Voted
ICCAD
2006
IEEE
15 years 10 months ago
2006
IEEE
110
Voted
FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
141
click to vote
FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
Abstract— This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of a...
156
click to vote
FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper presents a hardware-optimized variant of the well-known Gaussian elimination over GF(2) and its highly efficient implementation. The proposed hardware architecture, we...
125
click to vote
FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
— Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited ...
127
click to vote
FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...