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140
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ATS
2003
IEEE
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ATS 2003
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Automatic Design Validation Framework for HDL Descriptions via RTL ATPG
15 years 8 months ago
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computing.ece.vt.edu
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
Liang Zhang, Michael S. Hsiao, Indradeep Ghosh
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