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121
Voted
ISLPED
1999
ACM
131
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Hardware
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ISLPED 1999
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Challenges in clockgating for a low power ASIC methodology
15 years 7 months ago
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www.cs.utah.edu
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
David Garrett, Mircea R. Stan, Alvar Dean
claim paper
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