Sciweavers

ASPDAC
1999
ACM

113views Hardware» more ASPDAC 1999»

An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures

15 years 7 months ago

In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to thei...

C. K. Eem, J. W. Chong

claim paper

Read More »

Sciweavers

Explore & Download

Productivity Tools

Sciweavers