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JETC
2008
127views more  JETC 2008»
13 years 4 months ago
Automated module assignment in stacked-Vdd designs for high-efficiency power delivery
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...
Yong Zhan, Sachin S. Sapatnekar
ISPD
1998
ACM
89views Hardware» more  ISPD 1998»
13 years 9 months ago
Timing metrics for physical design of deep submicron technologies
Performance-driven physical design is becoming more important as advances in IC technologies enable gigahertz operating frequencies. These same IC technologies, however, exhibit d...
Lawrence T. Pileggi