—Increasing power densities due to process scaling, combined with high switching activity and poor cooling environments during testing, have the potential to result in high integ...
David R. Bild, Sanchit Misra, Thidapat Chantem, Pr...
This paper describes an efficient implementation of an effective sequential synthesis operation that uses induction to detect and merge sequentially-equivalent nodes. State-encodi...
Alan Mishchenko, Michael L. Case, Robert K. Brayto...
— The emergence of multi-core and many-core processors has introduced new opportunities and challenges to EDA research and development. While the availability of increasing paral...
—Hardware Intellectual Property (IP) cores have emerged as an integral part of modern System–on–Chip (SoC) designs. However, IP vendors are facing major challenges to protect...
Abstract—On-chip power density and temperature are rising exponentially with decreasing feature sizes. This alarming trend calls for temperature management at every level of syst...
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...
– Due to reduction in device feature size and supply voltage, the sensitivity of digital systems to transient faults is increasing dramatically. As technology scales further, the...
Abstract— As VLSI technology enters the nanoscale regime, interconnect delay becomes the bottleneck of circuit performance. Compared to gate delays, wires are becoming increasing...
Proteins crystallization is a commonly used technique for protein analysis and subsequent drug design. It predicts the three-dimensional arrangement of the constituent amino acids...