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    DAC
    2005
    ACM
    103views Computer Architecture» more  DAC 2005»
    Simulation of the effects of timing jitter in track-and-hold and sample-and-hold circuits
    15 years 12 days ago
    Simulation of the effects of timing jitter in track-and-hold and sample-and-hold circuits
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    In this paper, we analyze the effect of jitter in track and hold circuits. The output spectrum is obtained in terms of the system function of the track and hold. It is a fairly g...
    V. Vasudevan
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