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ISCAS
2005
IEEE
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ISCAS 2005
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A low spur fractional-N frequency synthesizer architecture
15 years 8 months ago
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web.engr.oregonstate.edu
— A new architecture of a fractional-N phase-locked loop (PLL) frequency synthesizer is presented in this paper. The unique feature of the proposed frequency synthesizer is a loo...
Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moo...
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