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ISCAS
2011
IEEE
342views Hardware» more  ISCAS 2011»
13 years 3 months ago
Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system
—Parallel structures may be used to increase a system processing speed in case of large amount of data or highly complex calculations. Dynamic Voltage and Frequency Scaling (DVFS...
Ying-Xun Lai, Yueh-Min Huang, Chin-Feng Lai, Ljilj...
ASPDAC
2011
ACM
167views Hardware» more  ASPDAC 2011»
13 years 3 months ago
Variation-tolerant and self-repair design methodology for low temperature polycrystalline silicon liquid crystal and organic lig
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...
Chih-Hsiang Ho, Chao Lu, Debabrata Mohapatra, Kaus...
RECOSOC
2007
118views Hardware» more  RECOSOC 2007»
14 years 1 months ago
A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems
Electronic equipments with higher performance, lower power consumption, and smaller size motivate the research for more efficient design methods. Platform-based design is a method...
Leandro Möller, Ismael Grehs, Ewerson Carvalh...
EH
1999
IEEE
179views Hardware» more  EH 1999»
14 years 4 months ago
Artificial Evolution of Active Filters: A Case Study
This article focuses on the application of artificial evolution to the synthesis of analog active filters. The main objective of this research is the achievement of a new class of...
Ricardo Salem Zebulum, Marco Aurélio Cavalc...
DAC
2009
ACM
14 years 4 months ago
Xquasher: a tool for efficient computation of multiple linear expressions
— Digital signal processing applications often require the computation of linear systems. These computations can be considerably expensive and require optimizations for lower pow...
Arash Arfaee, Ali Irturk, Nikolay Laptev, Farzan F...
FPL
2003
Springer
81views Hardware» more  FPL 2003»
14 years 5 months ago
Software Decelerators
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
Eric Keller, Gordon J. Brebner, Philip James-Roxby
SAMOS
2004
Springer
14 years 5 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...