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ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
14 years 10 months ago
Skew scheduling and clock routing for improved tolerance to process variations
The synthesis of clock network in the presence of process variation is becoming a vital design issue towards the performance of digital circuits. In this paper, we propose a clock ...
Ganesh Venkataraman, Cliff C. N. Sze, Jiang Hu