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137
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DATE
2006
IEEE
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DATE 2006
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Performance evaluation for system-on-chip architectures using trace-based transaction level simulation
15 years 9 months ago
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The ever increasing complexity and heterogeneity of modern System-on-Chip (SoC) architectures make an early and systematic exploration of alternative solutions mandatory. Efficien...
Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf
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