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    CODES
    2010
    IEEE
    140views Software Engineering» more  CODES 2010»
    Dynamic, non-linear cache architecture for power-sensitive mobile processors
    14 years 7 months ago
    Dynamic, non-linear cache architecture for power-sensitive mobile processors
    Download  cseart.ucsd.edu
    Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
    Garo Bournoutian, Alex Orailoglu
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