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ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
14 years 3 months ago
A low power scheduling scheme with resources operating at multiple voltages
This paper presents resource and latency constrained scheduling algorithms to minimize power/energy consumption when the resources operate at multiple voltages (5 V, 3.3 V,
Ali Manzak, Chaitali Chakrabarti
ICCAD
2003
IEEE
149views Hardware» more  ICCAD 2003»
14 years 7 months ago
Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module L
This paper proposes an optimum methodology for assigning supply and threshold voltages to modules in a CMOS circuit such that the overall energy consumption is minimized for a giv...
Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhij...
DAC
2003
ACM
14 years 11 months ago
Pushing ASIC performance in a power envelope
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kun...