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    DAC
    2003
    ACM
    175views Computer Architecture» more  DAC 2003»
    Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL
    15 years 10 months ago
    Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL
    Download  www.truecircuits.com
    John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay ...
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