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103
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DT
2007
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DT 2007
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Leakage Minimization Technique for Nanoscale CMOS VLSI
15 years 3 months ago
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www.ece.neu.edu
This paper proposes a new heuristic approach to determine the input pattern that minimizes leakage currents of nanometer CMOS circuits during sleep mode considering stack and fano...
Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Pa...
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