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TVLSI
2008
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13 years 9 months ago
Outer Loop Pipelining for Application Specific Datapaths in FPGAs
Most hardware compilers apply loop pipelining to increase the parallelism achieved, but pipelining is restricted to the only innermost level in a nested loop. In this work we exten...
Kieron Turkington, Turkington A. Constantinides, K...
AIEDU
2006
93views more  AIEDU 2006»
13 years 10 months ago
The Behavior of Tutoring Systems
Tutoring systems are described as having two loops. The outer loop executes once for each task, where a task usually consists of solving a complex, multi-step problem. The inner lo...
Kurt VanLehn