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129
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MICRO
2003
IEEE
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MICRO 2003
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Design and Implementation of High-Performance Memory Systems for Future Packet Buffers
15 years 8 months ago
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www.microarch.org
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
Jorge García-Vidal, Jesús Corbal, Ll...
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