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99
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ASPDAC
1995
ACM
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ASPDAC 1995
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A scheduling algorithm for synthesis of bus-partitioned architectures
15 years 6 months ago
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www.cs.york.ac.uk
- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi T...
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