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DSD
2010
IEEE
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DSD 2010
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A Parallel for Loop Memory Template for a High Level Synthesis Compiler
15 years 1 months ago
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—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
Craig Moore, Wim Meeus, Harald Devos, Dirk Strooba...
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