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EUC
2004
Springer
15 years 17 days ago
Efficient Scheduling for Design Exploration with Imprecise Latency and Register Constraints
In archiectural synthesis, scheduling and resource allocation are important steps. During the early stage of the design, imprecise information is unavoidable. Under the imprecise ...
Chantana Chantrapornchai, Wanlop Surakumpolthorn, ...