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    VLSID
    2002
    IEEE
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    An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis
    16 years 3 months ago
    An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis
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    In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
    Rupesh S. Shelar, Sachin S. Sapatnekar
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