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72
Voted
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
15 years 1 months ago
Repeater insertion in RLC lines for minimum propagation delay
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
Yehea I. Ismail, Eby G. Friedman
ICMCS
2000
IEEE
115views Multimedia» more  ICMCS 2000»
15 years 1 months ago
Common Time Reference for Interactive Multimedia Applications
A delay of about 100 ms gives human communicators the feeling of live interaction. Since in a global network the propagation delay alone is about 100 ms, every other delay compone...
Mario Baldi, Yoram Ofek
DATE
2010
IEEE
178views Hardware» more  DATE 2010»
15 years 1 months ago
Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variability
—With every process generation, the problem of variability in physical parameters and environmental conditions poses a great challenge to the design of fast and reliable circuits...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...
GLVLSI
2005
IEEE
199views VLSI» more  GLVLSI 2005»
15 years 2 months ago
Interconnect delay minimization through interlayer via placement in 3-D ICs
The dependence of the propagation delay of the interlayer 3-D interconnects on the vertical through via location and length is investigated. For a variable vertical through via lo...
Vasilis F. Pavlidis, Eby G. Friedman