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ACSD
2010
IEEE
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ACSD 2010
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A Complete Synthesis Method for Block-Level Relaxation in Self-Timed Datapaths
15 years 1 months ago
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ftp.cs.man.ac.uk
Self-timed circuits present an attractive solution to the problem of process variation. However, implementing selftimed combinational logic can be complex and expensive. This pape...
W. B. Toms, David A. Edwards
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