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ISVLSI
2006
IEEE
82views VLSI» more  ISVLSI 2006»
15 years 2 months ago
Reliability-Aware SOC Voltage Islands Partition and Floorplan
— Based on the proposed reliability characterization model, reliability-bounded low-power design as a methodology to balance reliability enhancement and power reduction in chip d...
Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan,...