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148
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ISQED
2006
IEEE
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ISQED 2006
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On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design
15 years 9 months ago
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vda.ee.nctu.edu.tw
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
Li-Chung Hsu, Hung-Ming Chen
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