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ISQED
2006
IEEE
107views Hardware» more  ISQED 2006»
15 years 2 months ago
Impact of Gate-Length Biasing on Threshold-Voltage Selection
Gate-length biasing is a runtime leakage reduction technique that leverages on the short-channel effect by marginally increasing the gate-length of MOS devices to significantly ...
Andrew B. Kahng, Swamy Muddu, Puneet Sharma