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133
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EURODAC
1995
IEEE
198
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VHDL
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EURODAC 1995
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On generating compact test sequences for synchronous sequential circuits
15 years 7 months ago
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www.cecs.uci.edu
We present a procedure to generate short test sequences for synchronous sequential circuits described at the gate level. Short test sequences are important in reducing test applic...
Irith Pomeranz, Sudhakar M. Reddy
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