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139
Voted
DAC
2008
ACM
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Computer Architecture
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DAC 2008
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Transistor level gate modeling for accurate and fast timing, noise, and power analysis
16 years 3 months ago
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Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada
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