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125
Voted
ICCAD
2010
IEEE
148
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ICCAD 2010
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Trace signal selection to enhance timing and logic visibility in post-silicon validation
15 years 1 months ago
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homepages.cae.wisc.edu
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-s...
Hamid Shojaei, Azadeh Davoodi
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105
Voted
ASPDAC
2007
ACM
139
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ASPDAC 2007
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Deeper Bound in BMC by Combining Constant Propagation and Abstraction
15 years 7 months ago
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www.cecs.uci.edu
ound in BMC by Combining Constant Propagation and Abstraction Roy Armoni, Limor Fix1 , Ranan Fraer1 , Tamir Heyman1,3 , Moshe Vardi2 , Yakir Vizel1 , Yael Zbar1 1 Logic and Validat...
Roy Armoni, Limor Fix, Ranan Fraer, Tamir Heyman, ...
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